RE: Improve CRC32C performance on SSE4.2

Devulapalli, Raghuveer <raghuveer.devulapalli@intel.com>

From: "Devulapalli, Raghuveer" <raghuveer.devulapalli@intel.com>

To: John Naylor <johncnaylorls@gmail.com>, Andy Fan <zhihuifan1213@163.com>

Cc: Nathan Bossart <nathandbossart@gmail.com>, Jesper Pedersen <jesperpedersen.db@gmail.com>, Tomas Vondra <tomas@vondra.me>, "pgsql-hackers@lists.postgresql.org" <pgsql-hackers@lists.postgresql.org>, "Shankaran, Akash" <akash.shankaran@intel.com>

Date: 2025-06-17T16:19:49Z

Lists: pgsql-hackers

Commits

Same data as JSON: GET /api/v1/messages/:b64id/commits the thread's linked commits as JSON, with link sources. API reference →

Include _mm512_zextsi128_si512() in AVX-512 configure probes.
- ccd5bc93fdfe 18.0 landed
Properly fix AVX-512 CRC calculation bug
- 43da394304fb 18.0 landed
Workaround code generation bug in clang
- f83f14881c7a 18.0 landed
Compute CRC32C using AVX-512 instructions where available
- 3c6e8c123896 18.0 landed
Inline CRC computation for small fixed-length input on x86
- e2809e3a1015 18.0 landed
Be more paranoid in configure's checks for CRC and POPCNT intrinsics.
- fdb5dd6331e3 18.0 cited

> In case Andy is asking about "how" rather than "under what circumstances", my
> guess is: -O1+  may have just chosen instructions that also happen to zero-extend,
> which are common. -O0 doesn't represent the naive straightforward structure of
> what the programmer wrote, it's more like an "exploded" representation suitable
> for later optimization passes. That's why it always looks goofy.

Hah yeah. I missed the "how" part of the question but your explanation makes sense. 

> > > Replacing that with _mm512_zextsi128_si512 fixes the problem.
> 
> Here's a patch for testing, which also reverts the previous workaround. Help
> welcome, but I still promise to test it in the near future regardless.

LGTM. 

Raghuveer