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Re: Reduce timing overhead of EXPLAIN ANALYZE using rdtsc?

Lukas Fittl <lukas@fittl.com>

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From: Lukas Fittl <lukas@fittl.com>
To: John Naylor <johncnaylorls@gmail.com>
Cc: Andres Freund <andres@anarazel.de>, Jakub Wartak <jakub.wartak@enterprisedb.com>, Hannu Krosing <hannuk@google.com>, Robert Haas <robertmhaas@gmail.com>, Pavel Stehule <pavel.stehule@gmail.com>, vignesh C <vignesh21@gmail.com>, Michael Paquier <michael@paquier.xyz>, Ibrar Ahmed <ibrar.ahmad@gmail.com>, Maciek Sakrejda <m.sakrejda@gmail.com>, pgsql-hackers <pgsql-hackers@postgresql.org>, David Geier <geidav.pg@gmail.com>
Date: 2026-04-04T09:21:14Z
Lists: pgsql-hackers

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On Fri, Apr 3, 2026 at 2:06 AM John Naylor <johncnaylorls@gmail.com> wrote:
>
> On Fri, Apr 3, 2026 at 6:16 AM Lukas Fittl <lukas@fittl.com> wrote:
> > v16
>
> Just some minor quibbles on 0002:

Thanks for the review!

>
> --- a/src/include/port/pg_cpu.h
> +++ b/src/include/port/pg_cpu.h
> @@ -23,6 +23,12 @@ typedef enum X86FeatureId
>   /* scalar registers and 128-bit XMM registers */
>   PG_SSE4_2,
>   PG_POPCNT,
> + PG_HYPERVISOR,
>
> The hypervisor flag doesn't really belong with an instruction family.
> Maybe a separate category like "identification"?

Yeah, I've pondered different names here, but "identification" seems
good for now - I agree it doesn't belong with the earlier flags.

>
> + /* TSC flags */
> + PG_RDTSCP,
> + PG_TSC_INVARIANT,
> + PG_TSC_ADJUST,
>
> Maybe spell out time stamp counter in the comment, since this will be
> the first time the reader encounters that in this file.

Makes sense, done.

FWIW, TSC can be spelled out either as "Time Stamp Counter" or
"Time-Stamp Counter". I've gone with the latter for now since that's
what was done elsewhere, and is how the Intel manuals reference it as
well.

>
> + * For some other Hypervisors that have an invariant TSC, e.g. HyperV, we would
> + * need to access an MSR to get the frequency (which is typically not available
>
> Maybe spell out MSR too, because I for one don't know what that is.

Done. I've also removed the note re: TSC calibration in that same
comment, since that's in a later commit and I don't think its
necessary to talk about it in that comment anyway.

>
> + X86Features[PG_HYPERVISOR] = reg[ECX] >> 31 & 1;
> + have_osxsave = reg[ECX] & (1 << 27);
> +
> + pg_cpuid_subleaf(0x07, 0, reg);
> +
> + X86Features[PG_TSC_ADJUST] = (reg[EBX] & (1 << 1)) != 0;
>
> Some inconsistency in shift style.

Fixed.

See attached v17.

Thanks,
Lukas

-- 
Lukas Fittl

Commits

Same data as JSON: GET /api/v1/messages/:b64id/commits the thread's linked commits as JSON, with link sources. API reference →

  1. pg_test_timing: Show additional TSC clock source debug info

  2. instrumentation: Avoid CPUID 0x15/0x16 for Hypervisor TSC frequency

  3. pg_test_timing: Also test RDTSC[P] timing, report time source, TSC frequency

  4. Allow retrieving x86 TSC frequency/flags from CPUID

  5. instrumentation: Standardize ticks to nanosecond conversion method

  6. instrumentation: Use Time-Stamp Counter on x86-64 to lower overhead

  7. Check for __cpuidex and __get_cpuid_count separately

  8. pg_test_timing: Reduce per-loop overhead

  9. Refactor handling of x86 CPUID instructions

  10. instrumentation: Drop INSTR_TIME_SET_CURRENT_LAZY macro

  11. Rename pg_crc32c_sse42_choose.c for general purpose

  12. Zero initialize uses of instr_time about to trigger compiler warnings

  13. instr_time: Represent time as an int64 on all platforms

  14. Add 250c8ee07ed to git-blame-ignore-revs