Re: Centralised architecture detection
John Naylor <johncnaylorls@gmail.com>
From: John Naylor <johncnaylorls@gmail.com>
To: Thomas Munro <thomas.munro@gmail.com>
Cc: PostgreSQL Hackers <pgsql-hackers@lists.postgresql.org>,
Andres Freund <andres@anarazel.de>, Lukas Fittl <lukas@fittl.com>
Date: 2026-04-09T08:16:33Z
Lists: pgsql-hackers
On Thu, Apr 9, 2026 at 8:02 AM Thomas Munro <thomas.munro@gmail.com> wrote: > Here's an update of my old patch. It just defines macros like this, > in c.h, though since then we gained port/pg_cpu.h, so perhaps it > belongs in there. port/pg_cpu.h would seem like the natural place for something like this, and I deliberately made that header's name not specific to one architecture. But see below. > Lukas and John have both been doing similar sorts of things and may > have better ideas or patches, but I figured I should at least re-post > what I have. From that thread, I think the final committed version ended up with fewer places that cared about architecture macros, and that's why it was left out. I for one was not motivated to continue that work, but I don't see a reason not to, either. And as you said, this might help avoid errors of omission going forward. --- a/src/port/pg_crc32c_sse42.c +++ b/src/port/pg_crc32c_sse42.c @@ -39,7 +39,7 @@ pg_comp_crc32c_sse42(pg_crc32c crc, const void *data, size_t len) * and performance testing didn't show any performance gain from aligning * the begin address. */ -#ifdef __x86_64__ +#ifdef PG_ARCH_X86_64 while (p + 8 <= pend) That probably should have been "SIZEOF_VOID_P >= 8" to begin with. Also, src/port/pg_cpu_x86.c currently has this hack: #if defined(USE_SSE2) || defined(__i386__) That's an awkward way of saying "x86 of any word size, but forget about 32-bit MSVC because it won't get tested in the buildfarm", and should probably use PG_ARCH_X86 from this patch. However, as currently written, that would only work if the new macros were in c.h, to keep the property that system headers come before (most) PG headers. -- John Naylor Amazon Web Services
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Fix CPU-identification macros for RISC-V.
- d3223485546e master landed
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Clean up inconsistencies in CPU-identification macros.
- 2ef57e636fc9 master landed