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Re: Reduce timing overhead of EXPLAIN ANALYZE using rdtsc?

Zsolt Parragi <zsolt.parragi@percona.com>

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From: Zsolt Parragi <zsolt.parragi@percona.com>
To: Lukas Fittl <lukas@fittl.com>
Cc: Andres Freund <andres@anarazel.de>, John Naylor <johncnaylorls@gmail.com>, Jakub Wartak <jakub.wartak@enterprisedb.com>, Hannu Krosing <hannuk@google.com>, Robert Haas <robertmhaas@gmail.com>, Pavel Stehule <pavel.stehule@gmail.com>, vignesh C <vignesh21@gmail.com>, Michael Paquier <michael@paquier.xyz>, Ibrar Ahmed <ibrar.ahmad@gmail.com>, Maciek Sakrejda <m.sakrejda@gmail.com>, pgsql-hackers <pgsql-hackers@postgresql.org>, David Geier <geidav.pg@gmail.com>
Date: 2026-04-07T07:32:43Z
Lists: pgsql-hackers 
> Its intentionally uint64, per this comment above it:
>
> * Note we utilize unsigned integers even though ticks are stored as a signed
> * value to encourage compilers to generate better assembly, since we can be
> * sure these values are not negative.
>
> In my earlier Compiler Explorer tests that did actually make a
> difference for the generated assembly.

Isn't that comment more about ticks_per_ns_scaled?

For max_ticks_no_overflow the only use is with a cast to int64, so I
didn't expect much assembly difference. Now I actually checked
locally/godbolt, and I don't see any actual differences. Making
max_ticks_no_overflow int64 and removing that cast generates exactly
the same code.

For ticks_per_ns_scaled, gcc 9-10 actually generates +1 mov
instruction with int64, but that's not present in more recent
versions.

Recent compiler versions only have an idiv/div and shr/sar difference.
Idiv is slower than div on intel, so that is a point for keeping
ticks_per_ns_scaled unsigned.

For arm I see the same lsr/asr and udiv/sdiv difference.

https://godbolt.org/z/4r5GTbrs3

(the main gcc vs clang difference seems to be clang's 32 bit division
optimization)

Commits

Same data as JSON: GET /api/v1/messages/:b64id/commits the thread's linked commits as JSON, with link sources. API reference →

  1. pg_test_timing: Show additional TSC clock source debug info

  2. instrumentation: Avoid CPUID 0x15/0x16 for Hypervisor TSC frequency

  3. pg_test_timing: Also test RDTSC[P] timing, report time source, TSC frequency

  4. Allow retrieving x86 TSC frequency/flags from CPUID

  5. instrumentation: Standardize ticks to nanosecond conversion method

  6. instrumentation: Use Time-Stamp Counter on x86-64 to lower overhead

  7. Check for __cpuidex and __get_cpuid_count separately

  8. pg_test_timing: Reduce per-loop overhead

  9. Refactor handling of x86 CPUID instructions

  10. instrumentation: Drop INSTR_TIME_SET_CURRENT_LAZY macro

  11. Rename pg_crc32c_sse42_choose.c for general purpose

  12. Zero initialize uses of instr_time about to trigger compiler warnings

  13. instr_time: Represent time as an int64 on all platforms

  14. Add 250c8ee07ed to git-blame-ignore-revs