Horton

Re: AIX support

Heikki Linnakangas <hlinnaka@iki.fi>

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From: Heikki Linnakangas <hlinnaka@iki.fi>
To: Srirama Kucherlapati <sriram.rk@in.ibm.com>, Heikki Linnakangas <hlinnaka@gmail.com>, Laurenz Albe <laurenz.albe@cybertec.at>, Bruce Momjian <bruce@momjian.us>
Cc: Peter Eisentraut <peter@eisentraut.org>, Alvaro Herrera <alvherre@alvh.no-ip.org>, "pgsql-hackers@postgresql.org" <pgsql-hackers@postgresql.org>, Noah Misch <noah@leadboat.com>, Michael Paquier <michael@paquier.xyz>, Andres Freund <andres@anarazel.de>, Tom Lane <tgl@sss.pgh.pa.us>, Thomas Munro <thomas.munro@gmail.com>, "tvk1271@gmail.com" <tvk1271@gmail.com>, "postgres-ibm-aix@wwpdl.vnet.ibm.com" <postgres-ibm-aix@wwpdl.vnet.ibm.com>
Date: 2024-08-14T07:46:38Z
Lists: pgsql-hackers

Commits

Same data as JSON: GET /api/v1/messages/:b64id/commits the thread's linked commits as JSON, with link sources. API reference →

  1. Restore AIX support.

  2. pg_createsubscriber: Improve error messages.

  3. Use <stdint.h> and <inttypes.h> for c.h integers.

  4. Stabilize jsonb_path_query test case.

  5. Fix C23 compiler warning

  6. pg_stat_statements: Add tests for nested queries with level tracking

  7. Add missing newline at the end of index_including.sql

  8. Remove AIX support

  9. Fix s_lock.h PPC assembly code to be compatible with native AIX assembler.

  10. Use a non-locking initial test in TAS_SPIN on PPC.

  11. Use LWSYNC in place of SYNC/ISYNC in PPC spinlocks, where possible.

  12. Use mutex hint bit in PPC LWARX instructions, where possible.

  13. Adjust TAS assembly as per recent discussions: use "+m"(*lock) everywhere

  14. Apple's assembler likes the inlined TAS syntax too, so no reason to

  15. Tighten up register usage for inline PPC version of tas().

  16. Put the isync where it's supposed to be.

  17. > > I'll re-check that with the ppc architecture guy here.

  18. Fix PPC s_lock operations to work correctly on multi-CPU machines.

  19. I tried to build PostgreSQL with the following step to see backends hung

  20. Complete merge of all old man page information.

  21. s_lock aix patch.

On 14/08/2024 06:31, Srirama Kucherlapati wrote:
> Hi Heikki & Team,
> 
> I tried to look at the assembly code changes with our team, in the below 
> file.
> 
> diff --git a/src/include/storage/s_lock.h b/src/include/storage/s_lock.h
> index 29ac6cdcd9..69582f4ae7 100644
> --- a/src/include/storage/s_lock.h
> +++ b/src/include/storage/s_lock.h
> static __inline__ int
> tas(volatile slock_t *lock)
> @@ -424,17 +430,15 @@ tas(volatile slock_t *lock)
> __asm__ __volatile__(
> "        lwarx   %0,0,%3,1        \n"
> "        cmpwi   %0,0                \n"
> "        bne     $+16                \n"                /* branch to li 
> %1,1 */
> "        addi    %0,%0,1                \n"
> "        stwcx.  %0,0,%3                \n"
> "        beq     $+12                \n"                /* branch to 
> lwsync */
> "        li      %1,1                \n"
> "        b       $+12                \n"                /* branch to end 
> of asm sequence */
> "        lwsync                                \n"
> "        li      %1,0                \n"
> :        "=&b"(_t), "=r"(_res), "+m"(*lock)
> :        "r"(lock)
> :        "memory", "cc");
> 
> For the changes in the above file,  this code is very specific to power 
> architecture we need to use the IBM Power specific asm code only, rather 
> than using the GNU assembler. Also, all these asm specific code is under 
> the macro __ppc__, which should not impact any other platforms. I see 
> there is a GCC specific implementation (under this macro #if 
> defined(HAVE_GCC__SYNC_INT32_TAS)) in the same file as well.

I'm sorry, I don't understand what you're saying here. Do you mean that 
we don't need to do anything here, and the code we have in s_lock.h in 
'master' now will work fine on AIX? Or do we need to (re-)do some 
changes to support AIX again? If we only support GCC, can we use the 
__sync_lock_test_and_set() builtin instead?

If any changes are required, please include them in the patch. That'll 
make it clear what exactly you're proposing.

> +#define TAS(lock)                      _check_lock((slock_t *) (lock), 
> 0, 1)
> 
> +#define S_UNLOCK(lock)         _clear_lock((slock_t *) (lock), 0)
> 
> The above changes are specific to AIX kernel and it operates on fixed 
> kernel memory. This is more like a compare_and_swap functionality with 
> sync capability. For all the assemble code I think it would be better to 
> use the IBM Power specific asm code to gain additional performance.

You mean we don't need the above? Ok, good.

> I was trying to understand here wrt to both the assemble changes if you 
> are looking for anything specific to the architecture.

I don't know. You tell me what makes most sense on AIX / powerpc.

> Attached is the patch for the previous comments, kindly please let me 
> know your comments.

Is this all that's needed to resurrect AIX support?

-- 
Heikki Linnakangas
Neon (https://neon.tech)