Horton

Re: Improve CRC32C performance on SSE4.2

Andy Fan <zhihuifan1213@163.com>

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From: Andy Fan <zhihuifan1213@163.com>
To: John Naylor <johncnaylorls@gmail.com>
Cc: "Devulapalli, Raghuveer" <raghuveer.devulapalli@intel.com>, Nathan Bossart <nathandbossart@gmail.com>, Jesper Pedersen <jesperpedersen.db@gmail.com>, Tomas Vondra <tomas@vondra.me>, "pgsql-hackers@lists.postgresql.org" <pgsql-hackers@lists.postgresql.org>, "Shankaran, Akash" <akash.shankaran@intel.com>
Date: 2025-06-18T10:18:15Z
Lists: pgsql-hackers

Commits

Same data as JSON: GET /api/v1/messages/:b64id/commits the thread's linked commits as JSON, with link sources. API reference →

  1. Include _mm512_zextsi128_si512() in AVX-512 configure probes.

  2. Properly fix AVX-512 CRC calculation bug

  3. Workaround code generation bug in clang

  4. Compute CRC32C using AVX-512 instructions where available

  5. Inline CRC computation for small fixed-length input on x86

  6. Be more paranoid in configure's checks for CRC and POPCNT intrinsics.

John Naylor <johncnaylorls@gmail.com> writes:

Hi,

>> Just be curious, what kind of optimization (like what -O2 does) could
>> mask this issue?
>
> In case Andy is asking about "how" rather than "under what
> circumstances", my guess is: -O1+  may have just chosen instructions
> that also happen to zero-extend, which are common. -O0 doesn't
> represent the naive straightforward structure of what the programmer
> wrote, it's more like an "exploded" representation suitable for later
> optimization passes. That's why it always looks goofy.

Thanks for the explaination!

>> > Replacing that with _mm512_zextsi128_si512 fixes the problem.
>
> Here's a patch for testing, which also reverts the previous
> workaround. Help welcome, but I still promise to test it in the near
> future regardless.

I verified the your patch, it works for me. 

-- 
Best Regards
Andy Fan