Re: Experimental patch for inter-page delay in VACUUM
Larry Rosenman <ler@lerctr.org>
From: Larry Rosenman <ler@lerctr.org>
To: Neil Conway <neilc@samurai.com>, Bruce Momjian <pgman@candle.pha.pa.us>
Cc: Tom Lane <tgl@sss.pgh.pa.us>, Andrew Sullivan <andrew@libertyrms.info>, pgsql-hackers@postgresql.org
Date: 2003-11-10T17:57:35Z
Lists: pgsql-hackers
--On Monday, November 10, 2003 11:40:45 -0500 Neil Conway <neilc@samurai.com> wrote: > Bruce Momjian <pgman@candle.pha.pa.us> writes: >> Now, the disadvantages of large kernel cache, small PostgreSQL buffer >> cache is that data has to be transfered to/from the kernel buffers, and >> second, we can't control the kernel's cache replacement strategy, and >> will probably not be able to in the near future, while we do control our >> own buffer cache replacement strategy. > > The intent of the posix_fadvise() work is to at least provide a > few hints about our I/O patterns to the kernel's buffer > cache. Although only Linux supports it (right now), that should > hopefully improve the status quo for a fairly significant portion of > our user base. > > I'd be curious to see a comparison of the cost of transferring data > from the kernel's buffers to the PG bufmgr. You might also look at Veritas' advisory stuff. If you want exact doc pointers, I can provide them, but they are in the Filesystem section of http://www.lerctr.org:8458/ LER > > -Neil > > > ---------------------------(end of broadcast)--------------------------- > TIP 3: if posting/reading through Usenet, please send an appropriate > subscribe-nomail command to majordomo@postgresql.org so that your > message can get through to the mailing list cleanly > -- Larry Rosenman http://www.lerctr.org/~ler Phone: +1 972-414-9812 E-Mail: ler@lerctr.org US Mail: 1905 Steamboat Springs Drive, Garland, TX 75044-6749