Horton

Re: Wierd context-switching issue on Xeon

Tom Lane <tgl@sss.pgh.pa.us>

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From: Tom Lane <tgl@sss.pgh.pa.us>
To: Bruce Momjian <pgman@candle.pha.pa.us>
Cc: pg@fastcrypt.com, Robert Creager <Robert_Creager@LogicalChaos.org>, Josh Berkus <josh@agliodbs.com>, Dirk_Lutzebäck <lutzeb@aeccom.com>, ohp@pyrenet.fr, Joe Conway <mail@joeconway.com>, "scott.marlowe" <scott.marlowe@ihs.com>, pgsql-performance@postgresql.org, Neil Conway <neilc@samurai.com>
Date: 2004-05-20T03:58:56Z
Lists: pgsql-performance 
Bruce Momjian <pgman@candle.pha.pa.us> writes:
> Tom Lane wrote:
>> ...  The SMP issue seems to be not with whether there is
>> instantaneous contention for the locked datastructure, but with the cost
>> of making it possible for processor B to acquire a lock recently held by
>> processor A.

> I see.  I don't even see a TODO in there.  :-(

Nothing more specific than "investigate SMP context switching issues",
anyway.  We are definitely in a research mode here, rather than an
engineering mode.

ObQuote: "Research is what I am doing when I don't know what I am
doing." - attributed to Werner von Braun, but has anyone got a
definitive reference?

			regards, tom lane