Re: AIX support - alignment issues

Hi,

On 2022-07-06 14:21:50 +1200, Thomas Munro wrote:
> --- a/src/backend/port/hpux/tas.c.template
> +++ /dev/null
> @@ -1,40 +0,0 @@
> -/*
> - * tas() for HPPA.
> - *
> - * To generate tas.s using this template:
> - *	1. cc +O2 -S -c tas.c
> - *	2. edit tas.s:
> - *		- replace the LDW with LDCWX
> - *	3. install as src/backend/port/tas/hpux_hppa.s.
> - *
> - * For details about the LDCWX instruction, see the "Precision
> - * Architecture and Instruction Reference Manual" (09740-90014 of June
> - * 1987), p. 5-38.
> - */
> -
> -int
> -tas(lock)
> -    int *lock;	/* LDCWX is a word instruction */
> -{
> -    /*
> -     * LDCWX requires that we align the "semaphore" to a 16-byte
> -     * boundary.  The actual datum is a single word (4 bytes).
> -     */
> -    lock = ((uintptr_t) lock + 15) & ~15;
> -
> -    /*
> -     * The LDCWX instruction atomically clears the target word and
> -     * returns the previous value.  Hence, if the instruction returns
> -     * 0, someone else has already acquired the lock before we tested
> -     * it (i.e., we have failed).

> -     *
> -     * Notice that this means that we actually clear the word to set
> -     * the lock and set the word to clear the lock.  This is the
> -     * opposite behavior from the SPARC LDSTUB instruction.  For some
> -     * reason everything that H-P does is rather baroque...
> -     */
> -    if (*lock) {	/* this generates the LDW */
> -	return(0);	/* success */
> -    }
> -    return(1);    	/* failure */
> -}

Are these comments retained elsewhere? It's confusing enough that I think we
should make sure they're somewhere until we remove hppa support...


> -#if defined(__ia64__) || defined(__ia64)
> -/*
> - * Intel Itanium, gcc or Intel's compiler.

Hm.  Personally I'd do HPUX removal separately from IA64 removal.

Greetings,

Andres Freund