v2-0001-Rename-CRC-choose-files-for-future-general-purpos.patch
text/x-patch
Filename: v2-0001-Rename-CRC-choose-files-for-future-general-purpos.patch
Type: text/x-patch
Part: 1
Message:
Re: centralize CPU feature detection
Patch
Format: format-patch
Series: patch v2-0001
Subject: Rename CRC "choose" files for future general purpose
| File | + | − |
|---|---|---|
| configure | 2 | 2 |
| configure.ac | 2 | 2 |
| src/port/Makefile | 1 | 0 |
| src/port/meson.build | 1 | 2 |
| src/port/pg_cpu_x86.c | 6 | 2 |
From 63e5d14b8a87c2cd69d7cf71b3001e7cf3b04ae1 Mon Sep 17 00:00:00 2001
From: John Naylor <john.naylor@postgresql.org>
Date: Wed, 11 Feb 2026 14:34:18 +0700
Subject: [PATCH v2 1/4] Rename CRC "choose" files for future general purpose
WIP: x86 only
---
configure | 4 ++--
configure.ac | 4 ++--
src/port/Makefile | 1 +
src/port/meson.build | 3 +--
src/port/{pg_crc32c_sse42_choose.c => pg_cpu_x86.c} | 8 ++++++--
5 files changed, 12 insertions(+), 8 deletions(-)
rename src/port/{pg_crc32c_sse42_choose.c => pg_cpu_x86.c} (94%)
diff --git a/configure b/configure
index a10a2c85c6a..185703289b4 100755
--- a/configure
+++ b/configure
@@ -18196,7 +18196,7 @@ if test x"$USE_SSE42_CRC32C" = x"1"; then
$as_echo "#define USE_SSE42_CRC32C 1" >>confdefs.h
- PG_CRC32C_OBJS="pg_crc32c_sse42.o pg_crc32c_sse42_choose.o"
+ PG_CRC32C_OBJS="pg_crc32c_sse42.o"
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: SSE 4.2" >&5
$as_echo "SSE 4.2" >&6; }
else
@@ -18204,7 +18204,7 @@ else
$as_echo "#define USE_SSE42_CRC32C_WITH_RUNTIME_CHECK 1" >>confdefs.h
- PG_CRC32C_OBJS="pg_crc32c_sse42.o pg_crc32c_sb8.o pg_crc32c_sse42_choose.o"
+ PG_CRC32C_OBJS="pg_crc32c_sse42.o pg_crc32c_sb8.o"
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: SSE 4.2 with runtime check" >&5
$as_echo "SSE 4.2 with runtime check" >&6; }
else
diff --git a/configure.ac b/configure.ac
index 814e64a967e..0955b7e4371 100644
--- a/configure.ac
+++ b/configure.ac
@@ -2245,12 +2245,12 @@ fi
AC_MSG_CHECKING([which CRC-32C implementation to use])
if test x"$USE_SSE42_CRC32C" = x"1"; then
AC_DEFINE(USE_SSE42_CRC32C, 1, [Define to 1 use Intel SSE 4.2 CRC instructions.])
- PG_CRC32C_OBJS="pg_crc32c_sse42.o pg_crc32c_sse42_choose.o"
+ PG_CRC32C_OBJS="pg_crc32c_sse42.o"
AC_MSG_RESULT(SSE 4.2)
else
if test x"$USE_SSE42_CRC32C_WITH_RUNTIME_CHECK" = x"1"; then
AC_DEFINE(USE_SSE42_CRC32C_WITH_RUNTIME_CHECK, 1, [Define to 1 to use Intel SSE 4.2 CRC instructions with a runtime check.])
- PG_CRC32C_OBJS="pg_crc32c_sse42.o pg_crc32c_sb8.o pg_crc32c_sse42_choose.o"
+ PG_CRC32C_OBJS="pg_crc32c_sse42.o pg_crc32c_sb8.o"
AC_MSG_RESULT(SSE 4.2 with runtime check)
else
if test x"$USE_ARMV8_CRC32C" = x"1"; then
diff --git a/src/port/Makefile b/src/port/Makefile
index 6e3b7d154ed..47cfea1507d 100644
--- a/src/port/Makefile
+++ b/src/port/Makefile
@@ -44,6 +44,7 @@ OBJS = \
noblock.o \
path.o \
pg_bitutils.o \
+ pg_cpu_x86.o \
pg_localeconv_r.o \
pg_numa.o \
pg_popcount_aarch64.o \
diff --git a/src/port/meson.build b/src/port/meson.build
index d7d4e705b89..edb2e5632bd 100644
--- a/src/port/meson.build
+++ b/src/port/meson.build
@@ -7,6 +7,7 @@ pgport_sources = [
'noblock.c',
'path.c',
'pg_bitutils.c',
+ 'pg_cpu_x86.c',
'pg_localeconv_r.c',
'pg_numa.c',
'pg_popcount_aarch64.c',
@@ -86,8 +87,6 @@ replace_funcs_pos = [
# x86/x64
['pg_crc32c_sse42', 'USE_SSE42_CRC32C'],
['pg_crc32c_sse42', 'USE_SSE42_CRC32C_WITH_RUNTIME_CHECK'],
- ['pg_crc32c_sse42_choose', 'USE_SSE42_CRC32C'],
- ['pg_crc32c_sse42_choose', 'USE_SSE42_CRC32C_WITH_RUNTIME_CHECK'],
['pg_crc32c_sb8', 'USE_SSE42_CRC32C_WITH_RUNTIME_CHECK'],
# arm / aarch64
diff --git a/src/port/pg_crc32c_sse42_choose.c b/src/port/pg_cpu_x86.c
similarity index 94%
rename from src/port/pg_crc32c_sse42_choose.c
rename to src/port/pg_cpu_x86.c
index f586476964f..998a70ffa41 100644
--- a/src/port/pg_crc32c_sse42_choose.c
+++ b/src/port/pg_cpu_x86.c
@@ -1,6 +1,6 @@
/*-------------------------------------------------------------------------
*
- * pg_crc32c_sse42_choose.c
+ * pg_cpu_x86.c
* Choose between Intel SSE 4.2 and software CRC-32C implementation.
*
* On first call, checks if the CPU we're running on supports Intel SSE
@@ -13,13 +13,15 @@
*
*
* IDENTIFICATION
- * src/port/pg_crc32c_sse42_choose.c
+ * src/port/pg_cpu_x86.c
*
*-------------------------------------------------------------------------
*/
#include "c.h"
+#if defined(USE_SSE2) || defined(__i386__)
+
#if defined(HAVE__GET_CPUID) || defined(HAVE__GET_CPUID_COUNT)
#include <cpuid.h>
#endif
@@ -107,3 +109,5 @@ pg_comp_crc32c_choose(pg_crc32c crc, const void *data, size_t len)
}
pg_crc32c (*pg_comp_crc32c) (pg_crc32c crc, const void *data, size_t len) = pg_comp_crc32c_choose;
+
+#endif /* defined(USE_SSE2) || defined(__i386__) */
--
2.53.0