0001-Replace-tas-asm-with-gcc-routines-for-powerPC-implem.patch

From a08fbe47316034c458fcfb748efd7caabad9893f Mon Sep 17 00:00:00 2001
From: Sriram RK <sriram.rk@in.ibm.com>
Date: Tue, 24 Sep 2024 05:04:51 -0500
Subject: [PATCH 1/1] Replace tas() asm with gcc routines for powerPC
 implementaion in s_lock.h .

---
 src/include/storage/s_lock.h | 43 ++++--------------------------------
 1 file changed, 4 insertions(+), 39 deletions(-)

diff --git a/src/include/storage/s_lock.h b/src/include/storage/s_lock.h
index 2f6eb5df2a..c0cc7bd38b 100644
--- a/src/include/storage/s_lock.h
+++ b/src/include/storage/s_lock.h
@@ -401,54 +401,19 @@ typedef unsigned int slock_t;
 
 #define TAS(lock) tas(lock)
 
-/* On PPC, it's a win to use a non-locking test before the lwarx */
+/* On PPC, use the gcc atomic routines, to set the lock. */
 #define TAS_SPIN(lock)	(*(lock) ? 1 : TAS(lock))
 
-/*
- * The second operand of addi can hold a constant zero or a register number,
- * hence constraint "=&b" to avoid allocating r0.  "b" stands for "address
- * base register"; most operands having this register-or-zero property are
- * address bases, e.g. the second operand of lwax.
- *
- * NOTE: per the Enhanced PowerPC Architecture manual, v1.0 dated 7-May-2002,
- * an isync is a sufficient synchronization barrier after a lwarx/stwcx loop.
- * But if the spinlock is in ordinary memory, we can use lwsync instead for
- * better performance.
- */
 static __inline__ int
 tas(volatile slock_t *lock)
 {
-	slock_t _t;
-	int _res;
-
-	__asm__ __volatile__(
-"	lwarx   %0,0,%3,1	\n"
-"	cmpwi   %0,0		\n"
-"	bne     $+16		\n"		/* branch to li %1,1 */
-"	addi    %0,%0,1		\n"
-"	stwcx.  %0,0,%3		\n"
-"	beq     $+12		\n"		/* branch to lwsync */
-"	li      %1,1		\n"
-"	b       $+12		\n"		/* branch to end of asm sequence */
-"	lwsync				\n"
-"	li      %1,0		\n"
-
-:	"=&b"(_t), "=r"(_res), "+m"(*lock)
-:	"r"(lock)
-:	"memory", "cc");
-	return _res;
+    return __sync_lock_test_and_set(lock, 1);
 }
 
 /*
- * PowerPC S_UNLOCK is almost standard but requires a "sync" instruction.
- * But we can use lwsync instead for better performance.
+ * PowerPC S_UNLOCK use the gcc atomic routines. 
  */
-#define S_UNLOCK(lock)	\
-do \
-{ \
-	__asm__ __volatile__ ("	lwsync \n" ::: "memory"); \
-	*((volatile slock_t *) (lock)) = 0; \
-} while (0)
+#define S_UNLOCK(lock) __sync_lock_release(lock)
 
 #endif /* powerpc */
 
-- 
2.41.0